Thoughts about SSA Form about LLVM translation

Say, in my case, I translate traditional binary code into LLVM. 

In traditional instruction set architecture, each architecture state (registers, status register, etc...) is possible being accessed outside the current code to be translated.

Thus, I have to treat every register state as a global memory variable. As a result, all instructions are treated as operations on global memory.

So I don't have to translate the binary into SSA form before translating it into LLVM IR because in LLVM memory variables don't have to be SSA form.

In the case of PTX code, it is a virtual ISA, and there are some virtual registers that is private to the current translated unit, meaning that they wont be accessed outside of this kernel.